Testing 1PPS Time Sync Mode
If you have an M3 Sonar Head with a 1PPS connector, you can synchronize the Sonar Head clock with an external 1PPS source. After you have enabled the 1PPS Time Sync Mode, you can make sure it is working by reading through the Output Messages log file.
Prerequisites
•  The Sonar Head must be upgraded to the latest firmware version (version 1.5 or later).
•  1PPS synchronization requires ZDA input over UDP to the Sonar Head (not to the M3 software) on UDP port 31100 at 1Hz.
•  The 1PPS signal must be sent to the Sonar Head using the 1PPS input on one of the following cables.
–  10-pin SEA CON® MINK-10-CCPL cable used with M3 Sonar model 922-20220000.
–  4-pin SEA CON® MIND-4-FCR cable used with M3 Sonar model 922-20050000.
Procedure
1 Click SetupSystem ConfigurationDevicesSonar Setup.
2 In the Device Properties table, select 1PPS from the Time Sync Mode drop-down list.
3 Click Close.
4 Click SetupConnect to start the Sonar Head.
5 Click DisplayOutput Messages Window.
Observe that the Output Messages window opens.
6 Select the Head Messages tab in the Output Messages window.
Alternatively, navigate to C:\KML\M3_V0253\LOGS. Open the latest HEAD log file in a text editor.
7 Read through the Output Messages log and look for errors.
Example
The following is an example of some 1PPS log entries, including an explanation of what each entry means.
•  INF System Time 1518282830 s 653 ms 734 us
A response to host cmd for the sonar head’s current timestamp.
•  INF 1PPS: 10 pulses received in 10s
The number of 1PPS pulses received in ten seconds. If you are seeing less than ten pulses received, then 1PPS is not working as expected.
•  INF SNSUDP IP Addr 192.168.1.233:13685, len=39
INF $GPZDA,171355.432,10,02,2018,00,00*5F
The sensor data string received. The ZDA string will be displayed if valid, otherwise bytes of the received string will be displayed.
•  INF PPS preLD
INF ZDA: 1518282835 2018/02/10/ 15:32:17.910
If valid ZDA data is being received, it will be displayed here in units of Epoch seconds GMT. This value will be rounded up to the next integer second and pre-loaded in an FPGA staging register. This register will reset the timestamp clock at the next 1PPS pulse.
•  INF PPS 1518282835.999s 20000000
The timestamp latched at the 1PPS leading edge. This timestamp should be close to the most recent ZDA data received.